my ideas in action
Category Archives: cmos
October 17, 2013Posted by on
I just started a new project. It is a lab power supply. The main target is to do it with a microcontroler (PIC) qnd to have good enough accuracy.
My spec is 5mV per step for output voltage and 1mA per step for current. The max voltage is 20.48V and max current is 1.024A.
For this I will have a LCD screen ( 16×2 characters) and the panel will be with push burrons. I do not want to use rotary encoders.
The Lab Power Supply will use a AC-DC converter from 220V AC and will provide also some other fixed voltages like : 5V, 3.3V and maybe others (12V).
For the moment I have two old AC-DC converter from some printers (HP and Canon).
For the case I think I will use a old DVD player case since I have there all the necessary buttons and front panel.
I target to use PIC16F1789 since it is powerfull enough and has many IO pins. The ADC reading will be made with MCP3201 12bit and the DAC wil be MCP4922 dual 12bit DAC.
For the reference I intend to use MCP1541 but here I am not sure. I may also use a trimmable reference since I want to be precise for the 4.096V value.
For the current measurement I wanted to use INA210 or similar from TI but they are not cheap and hard to find. Also TI sample program is a nightmare. So I decided to use a opamp and a PNP to read the high-side current.
The opamp that I want to use is MCP6022 (2 OPA per package) . I need to use this opamp since it needs very low offset and full rail-to-rail input/output.
The other opamps that I have are not well suited for this job (some have bigger offset or/and not rail-to-rail in/out).
The ILIM loop and voltage loop are made fully in analog domain. I do not want to make it in software since may create issues later and also because I have more experience with the analog than PIC software. The other reason is that it is easier to debug and they are modular.
For the voltage divider I use a buffer since the ADC require low inpedance input source and a simple resistor divider will not work well.
I added below the full schematic that I have now. It is still a work in progress so I do not encourage anyone to think that is fully functional or that is tested. It is just a schematic made based on my knowledge.
LabPicSupply version 1 (pdf file)
August 12, 2013Posted by on
I want to describe here some schematics for a power switch. The soft power switch is in fact a electronic switch ( no relay, no moving parts) that can be used as a ON/OFF for a certain device.
The classical way to switch ON/OFF a device is to use a flip switch like this :
But this mechanical switch is expensive and can break after a wile.
The other big disadvantage is that it require the mains AC line (supply line) to physically pass through that switch. So if for example you want to put the ON/OFF switch on the front panel of a device you have to go there with AC 110/220V mains. This can create problems (noise, interference…)
Beside this some people want a “fancy” ON/OFF function with only a simple push button. Like this:
So The switch is very small and can be integrated directly on the PCB board. Beside this there is very small voltages/current passing so there is no risk of electroshock.
Usually this type of application use DC voltages in the 3-24V domain. They are used often to start a board that has micro-controller or a small electronic device.
The following possibilities are shown below:
April 17, 2013Posted by on
The cascodes are used generally to increasing the output impedance of a current mirror. But sometime this is not enough. After all a ideal current source has infinite impedance so we must always try to achieve this very high output impedance.
Usually to increase the output impedance a gain is needed to “boost” the performance. This “classical” way is to use a opamp or a simple MOS transistor to acheave this.
The solution that I want to present here is simple and give good results.
M1-M4 form the classical cascode topology. The M16 current flow in to M2 so the size of M2 must be bigger than M1. Usually is 2x, 4x bigger.
The input voltage for this current mirror is VGS1 = Vt+Von.
The input impedance is 1/gm1 = small = in the order of kOhms.
The output minimum voltage is Vds16+Vds2 = usually 200-400mV
The output impedance is ro2*gm3*ro3*gm16*ro16 = big = usually in the order of 100x MOhms
The best value of Vbias is Vds2+Vgs16. This can be obtained with a replica type of circuit.
November 29, 2012Posted by on
I want to comment a little bit about a classical CMOS level-shifter that has a less known issue.
The level-shifter is used to transfer logic signals from a low voltage domain ( example 1V8) to a higher voltage ( ex 3V3). This level-shifter works fine in almost all applications, when 1V8 and 3V3 supply voltages are present.
But what is happening when one of the supply is missing ?
Case A : 3V3V is zero. In this case the output is forced to zero since there is no supply for inverter T7,T8.
Case B: 1V8 is missing. This is more complicated. Because the T1, T2 form a latch, they will keep the state for long time. The value is not hard defined so it may change after some time.
But the issue that I want to present is that if for example the latch had a certain state when the 1V8 was present then it will keep that state even if the 1V8 will disappear. It is the very nature of the latch to keep his data as long as possible.
So lets say that the 1V8 has present and IN=high. It means that INB=low and A=high (3V3) and B=low (zero). The OUT is low.
If the 1V8 disappear very fast , so that the IN do not have time to toggle then what is happens ? The INB stay low since there is no supply on 1V8 rail. The IN = low since there is nobody to drive this input. The circuits that are connected to IN were supplied also by 1V8 rail. The T3 and T4 have now both the gates to VSS. So the latch T1,T2 has no reason to change his state. The 3V3 is still present so the latch keep his state. So is easy to see that the latch still give OUT=low even if there is nobody to drive the input of the level-shifter.
What is happening when the 1V8 come back ? The inverter T5,T6 keep his state until the V1V8 is high enough (>Vth) and only after that toggle to the signal on IN.
This memory effect can be a feature of a issue.
It may be considered a feature if by memorizing the state it is doing something useful in the system.
If not , then it can be considered a issue/problem/bug since sometime we want to know that 1V8 do not exist anymore and we may need some signals to be reseted.
So use this level-shifter it with great care. And if you do not need this “memory” effect, then do not use this latch type level-shifter.